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Rather use a bend or chamfer to flatten out the corner. It includes alot of EE 101 lessons such as don’t use right angles in your traces. When laying out power, I go with something larger based on the max current I expect and whatever a trace calculator tells me is the minimum.Īutodesk has a good “10 PCB Routing Tips” write up. So for signal traces, OSHPark can do a minimum of 6 mils. Eagle automatically starts flagging clearance and other layout issues. I use Eagle and when you start a board, you click on DRC and load the “OSHPart 2-layer” rules.
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OSHPark has a design rules package that you can download for all the major CAD programs. Pick your board house before you start your layout and check their recommendations for board layout. However, signal traces should be kept as small as possible to minimize EMI, cross-talk, capacitance introduction, etc. If your device is a power management device that will deliver significant current, then 20-50 mil traces isn’t uncommon. I agree with A BGA isn’t a good choice for beginners if you can get a SOIC for the same device. Good luck in your efforts, I hope this was helpful. Your package will likely only generate 1/100 that current so a much thinner trace will be fine. Using this example, a 20mil trace could carry 750mA with only a 20F Temp rise over 70F ambient temp over a 1 inch trace. I use OSHPark’s prototype service which is 2 layers (traces are not inside the FR4) and 1 oz copper. If you were looking to put a significant current through a trace, you should use one of the many trace width calculators on the web such as this one: The trace width is primarily about the amount of current you can pass without loss and excess heating. I use OSHPark and you can find there rules for (looks like you are using EAGLE) here: The company which will manufacture your boards should give you design rules even in electronic format to help you understand their minimum trace width and clearance standards and check your design against them before you send the board for production. For a BGA package like this, you are likely not driving much current so a much smaller trace will be fine and easier to route. Sometimes, you can find a SOIC or TSSOP package for your chip which will be easier to solder and troubleshoot.īy PCB standards, 20 mils is a huge trace which I might use for power distribution across an entire board.
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In your post, it looks like you are using a Ball Grid Array package. Being a relative newbie at this (only 4 years) I can remember having some of these questions: You are asking a very reasonable question. Yo see you are trying your hand at PCB layout.